Ucie Spec < 2026 Edition >
| Protocol | Use Case | |----------|-----------| | | Legacy I/O, GPUs, accelerators, SSDs | | CXL (v2.0/v3.0) | Cache-coherent memory expansion, memory pooling, accelerators | | Streaming | Raw data streams, non-coherent custom IP, streaming interfaces |
is an open industry standard for die-to-die (D2D) interconnect and serial bus. It defines the physical layer, protocol stack, and compliance rules to enable heterogeneous chiplets (from different vendors, fabs, and process nodes) to interoperate seamlessly within a single advanced package. ucie spec
The UCIe specification is after registration at: https://www.uciexpress.org/specification | Protocol | Use Case | |----------|-----------| |


















